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Implementation of 2bit Barrel Shifter Using Two Phase Clocked Adiabatic Static CMOS Logic (2PASCL)

K. Srinivasarao, Gaurav Sharma


Now a days power Reduction Techniques is major issue, when we are implementing digital circuits for low power VLSI Application. I had used adiabatic logic for reduction of power dissipation. So many Logic are available, apart that logic, one of logic is adiabatic, to reduced power dissipation instead of heat dissipation. In digital electronics, Barriel shifter plays important Role, it performs Shifting of Bits either Left or Right Depending upon Select line. This paper compares conventional CMOS Logic 2x1 mux with Proposed Two phase clocked adiabatic static cmos logic (2PASCL) 2X1mux,and then proposed circuit has been implemented into 2_Bit barrel shifter. The simulation successfully completed using spice circuit simulator with 0.18um technology .From the result, it was found that proposed circuits have less power dissipation compared with CMOS logic at 50_100 MHZ frequency.

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